1. Field of the Invention
The present invention relates to a radio selective call receiver, and in particular to a phase-locked loop control method for the radio selective call receivers
2. Description of the Related Art
In conventional radio selective call receivers, the phase-locked loop control is performed for all change points using the output of a comparator having only one reference value.
For example, in a technique disclosed in Japanese Patent Laid-open No. 7-154434, an average value of a detected signal at the time of detection of a preamble signal is derived, and the code decision of the detected signal is made by using the average value of the detected signal as a reference level by means of digital signal processing.
Even if a variation is caused in the middle voltage of the detected signal due to a variation of the transmission frequency, a temperature change of the receiver, a supply voltage variation, and the like, errors of the code decision are reduced by the above described processing.
Furthermore in the above described technique, an ideal decision level is derived from the above described reference level, and the ideal decision level is used to obtain an error of the inputted detected signal. Correcting the error allows the reference level to follow the variation of the middle voltage of the detected signal.
In the conventional phase-locked loop control in the radio selective call receiver, the phase-locked loop control is performed for all change points using the output of a comparator having only one reference value. In systems using a binary FSK (Frequency Shift Keying) method, therefore, no problems occur. In systems using an M-ary (M greater than 2) FSK method such as 4-ary FSK method, however, there occurs a problem that signal boundaries cannot be detected accurately, resulting in a reduced accuracy of phase control.
Therefore, an object of the present invention is to provide a radio selective call receiver capable of overcoming the above described problems, which can improve the accuracy of phase-locked loop control.
According to an aspect of the present invention, a radio receiver includes a detector for detecting a detected signal from a received radio signal; a monitor for monitoring an amplitude change of the detected signal to detect timing where the amplitude change occurs over a predetermined range: a clock generator for generating a timing clock signal; and a controller performing a phase-locked control of the timing clock signal only when the timing is detected by the monitor.
In other words, a phase-locked control or phase tracking control is performed using the timing or position of the detected signal exhibiting a high signal duty accuracy. Therefore, the receiving accuracy of a radio signal is improved.
According to another aspect of the present invention, a radio receiver for receiving a digital-modulated signal is comprised of a detector for detecting a detected signal from the digital-modulated signal, the detected signal having a plurality of signal levels and a comparator for comparing the detected signal to a plurality of reference levels to produce a plurality of comparison signals. Further, the receiver Is provided with a monitor for monitoring an amplitude change of the detected signal to detect a swing range of the detected signal and timing where the amplitude change occurs over the swing range; a selector for selecting one of the plurality of comparison signals. depending on the swing range detected by the monitor; and a controller performing a phase-locked control of a timing clock signal with respect to a selected comparison signal only when the timing is detected by the monitor.
Since one of a plurality of comparison signals is selected depending on the swing range detected by the monitor and is used for the phase-locked control. more accurate phase control is achieved, resulting in improved receiving performance.